1. Field of the Invention
The present invention relates to a device and a process for detecting errors in an integrated circuit comprising a parallel-serial and serial-parallel port.
2. Description of Related Art
Integrated circuits are known which comprise interfaces between a parallel bus and a serial bus, but in general these do not include a device and process for detecting and recovering from errors, since they are based on the assumption that the communication does not comprise any errors involving the serial link, or if it does comprise any, the detections of errors and recoveries from errors are handled in a higher layer (synchronization loss) at the software level.